ARM - Advanced SIMD register - quadword (128 bits wide) and doubleword (64 bits wide)

妖狐艹你老母 2022-10-31 13:47 13阅读 0赞

# **ARM - Advanced SIMD register - quadword (128 bits wide) and doubleword (64 bits wide)** #

## 1. Bytes, Halfwords, and Words ##

**Byte**  
Eight bits (8 bits).

**Halfword**  
Two bytes (16 bits).

**Word**  
Four bytes (32 bits).

**Quadword**  
16 contiguous bytes (128 bits).

## 2. Register encoding ##

Advanced SIMD registers are either quadword (128 bits wide) or doubleword (64 bits wide). Some instructions have options for either doubleword or quadword registers. This is normally encoded in `Q (bit [6])` as `Q = 0` for doubleword operations, `Q = 1` for quadword operations.  
一些指令具有双字或四字寄存器的选项。通常，它以 `Q (bit [6])` 编码，对于双字操作，`Q = 0`，对于四字操作，`Q = 1`。

## References ##

**ARM Cortex-A Series Programmer’s Guide for ARMv8-A**  
[https://developer.arm.com/documentation/den0024/a/Porting-to-A64/Data-types][https_developer.arm.com_documentation_den0024_a_Porting-to-A64_Data-types]  
**RealView Platform Baseboard for Cortex-A8 User Guide**  
[https://developer.arm.com/documentation/dui0417/d/preface/about-this-book/other-conventions][https_developer.arm.com_documentation_dui0417_d_preface_about-this-book_other-conventions]  
**ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition**  
[https://developer.arm.com/documentation/ddi0406/b/Application-Level-Architecture/Advanced-SIMD-and-VFP-Instruction-Encoding/Register-encoding][https_developer.arm.com_documentation_ddi0406_b_Application-Level-Architecture_Advanced-SIMD-and-VFP-Instruction-Encoding_Register-encoding]

[https_developer.arm.com_documentation_den0024_a_Porting-to-A64_Data-types]: https://developer.arm.com/documentation/den0024/a/Porting-to-A64/Data-types
[https_developer.arm.com_documentation_dui0417_d_preface_about-this-book_other-conventions]: https://developer.arm.com/documentation/dui0417/d/preface/about-this-book/other-conventions
[https_developer.arm.com_documentation_ddi0406_b_Application-Level-Architecture_Advanced-SIMD-and-VFP-Instruction-Encoding_Register-encoding]: https://developer.arm.com/documentation/ddi0406/b/Application-Level-Architecture/Advanced-SIMD-and-VFP-Instruction-Encoding/Register-encoding