Xilinx Jtag Access/svf文件/BSCANE2

Bertha 。 2022-10-09 06:19 79阅读 0赞

可以在vivado安装bin目录使用xsdb.bat或xsct.bat调出命令行控制界面：【除了使用官方的usb-jtag接口，还可以使用open ocd的接口开发（不过，openocd可能不支持xilinx-jtag-cable，像FTDI芯片都是可以支持的）】

jtag access提供了原生的jtag接口数据访问，通过primitive BSCANE2，即可访问fpga内部的自定义jtag tap,实现数据读写功能。

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70][]

#List all targets.
    jtag targets
    #List targets with name "arm_dap".
    jtag targets -filter {name == "arm_dap"}
    #Set target with id 2 as the current target.
    jtag targets 2
    #Set current target to target with name starting with "arm".
    jtag targets -set -filter {name =~ "arm*"}
    jtag targets -set -filter {level == 0}
    
    
    
    set seqname [jtag sequence] 
    $seqname state RESET 
    $seqname drshift -capture -tdi 0 256 
    set result [$seqname run] 
    $seqname delete.

[https://www.xilinx.com/support/documentation/sw\_manuals/xilinx2017\_4/ug1208-xsct-reference-guide.pdf][https_www.xilinx.com_support_documentation_sw_manuals_xilinx2017_4_ug1208-xsct-reference-guide.pdf]

jtag基本介绍：

jtag根据tms信号实现了16种状态，主要为sel-capture-shift-update，内部通过IR/DR两种寄存器实现数据传输，IR/DR的长度都不是固定标准的，由实际设计需要决定。

***DS593 (v1.5.1) August 6, 2018 Platform Cable USB II***  
***UG570 (v1.10) February 21, 2019 UltraScale Architecture Configuration***  
***UG974 (v2020.1) June 3, 2020 UltraScale Architecture Libraries Guide***

xilinx还提供了一个非常鸡肋的ip,其文档并没有指出具体使用方法：

***PG365 (v1.0) October 30, 2019 BSCAN to JTAG Converter v1.0***

***仅有的参考：***

[https://forums.xilinx.com/t5/FPGA-Configuration/How-to-use-BSCANE2-and-BSCAN2JTAG-IP-to-access-own-TAP-through/td-p/1115013][https_forums.xilinx.com_t5_FPGA-Configuration_How-to-use-BSCANE2-and-BSCAN2JTAG-IP-to-access-own-TAP-through_td-p_1115013]

[https://github.com/eugene-tarassov/vivado-risc-v/blob/master/vhdl-wrapper/src/net/largest/riscv/vhdl/bscan2jtag.vhdl][https_github.com_eugene-tarassov_vivado-risc-v_blob_master_vhdl-wrapper_src_net_largest_riscv_vhdl_bscan2jtag.vhdl]

关于仿真：JTAG\_SIME2 参考：[https://github.com/watz0n/arty\_xjtag][https_github.com_watz0n_arty_xjtag]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 1][]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 2][]

https://pan.baidu.com/s/1lgeE9hIQXsNg52VvbAMkzQ 提取码: 1210

svf文件：

[http://xilinx.eetrend.com/d6-xilinx/blog/2015-08/8908.html][http_xilinx.eetrend.com_d6-xilinx_blog_2015-08_8908.html]

[https://www.cnblogs.com/e-shannon/p/5919933.html][https_www.cnblogs.com_e-shannon_p_5919933.html]

[https://www.maximintegrated.com/cn/design/technical-documents/app-notes/3/3339.html][https_www.maximintegrated.com_cn_design_technical-documents_app-notes_3_3339.html]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 3][]

参考：

[https://www.xilinx.com/html\_docs/xilinx2018\_1/SDK\_Doc/xsct/jtag/reference\_xsct\_jtag.html][https_www.xilinx.com_html_docs_xilinx2018_1_SDK_Doc_xsct_jtag_reference_xsct_jtag.html]

swd与jtag:

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 4][]

***Programming Internal Flash Over the Serial Wire Debug Interface  
AN0062 - Application Note***

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 5][]

参考：

https://embeddedinventor.com/swd-vs-jtag-differences-explained/\#:~:text=SWD%20stands%20for%20Serial%20Wire%20Debug%20is%20the,info%20to%20the%20computer%20via%20the%20IO%20line.

swd接口：

[https://developer.arm.com/architectures/system-architectures/system-components/coresight/serial-wire-debug][https_developer.arm.com_architectures_system-architectures_system-components_coresight_serial-wire-debug]

关于BSCANE2使用：网上目前没有比较详细的用法，官方文档的描述也不是很清晰：（目前找到两个相关参考方案）

BSCAN参考1：xilinx 官方的picoblaze（8位MCU），这个工程提供了一个BSCAN烧写RAM/ROM的功能，但一些细节也不是很详细：

[https://www.xilinx.com/products/intellectual-property/picoblaze.html\#design][https_www.xilinx.com_products_intellectual-property_picoblaze.html_design]

XAPP188 (v2.3) June 20, 2008 Configuration and Readback of Spartan-II and Spartan-IIE FPGAs Using Boundary Scan：

[https://www.xilinx.com/support/documentation/application\_notes/xapp188.pdf][https_www.xilinx.com_support_documentation_application_notes_xapp188.pdf]

BSCAN参考2：Rocket Chip 的 BSCAN 调试

[https://jsteward.moe/risc-v-hardware-design-part-b-edgeboard-series.html][https_jsteward.moe_risc-v-hardware-design-part-b-edgeboard-series.html]

[https://jia.je/hardware/2020/02/09/rocket-chip-bscan-analysis/][https_jia.je_hardware_2020_02_09_rocket-chip-bscan-analysis]

[https://jia.je/hardware/2020/02/09/program-artix7-on-macos/][https_jia.je_hardware_2020_02_09_program-artix7-on-macos]

在：[https://github.com/watz0n/arty\_xjtag][https_github.com_watz0n_arty_xjtag]描述了一种BSCAN的使用方法：

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 6][]

[https://github.com/jordens/bscan\_spi][https_github.com_jordens_bscan_spi]

BSCAN参考3：

[https://github.com/cambridgehackers/fpgajtag][https_github.com_cambridgehackers_fpgajtag]

同时stackflow上也有一点bscan相关描述：

[https://stackoverflow.com/questions/30606531/any-example-useage-of-a-bscane2-primitive-in-xilinx-7-series-using-the-jtag-po][https_stackoverflow.com_questions_30606531_any-example-useage-of-a-bscane2-primitive-in-xilinx-7-series-using-the-jtag-po]

参考：

[http://xilinx.eetrend.com/content/2020/100059704.html][http_xilinx.eetrend.com_content_2020_100059704.html]

openocd:本质上是一个jtag server程序

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 7][]

[https://github.com/riscv/riscv-openocd/tree/7cb8843794a258380b7c37509e5c693977675b2a][https_github.com_riscv_riscv-openocd_tree_7cb8843794a258380b7c37509e5c693977675b2a]

[http://openocd.org/][http_openocd.org]

和openocd功能类似的还有一个xc3sprog：[http://xc3sprog.sourceforge.net/manpage.php][http_xc3sprog.sourceforge.net_manpage.php]

这篇文章也不错：使用ARM芯片操作**jtag接**口对FPGA进行配置：

[https://www.21ic.com/embed/hardware/can/201810/81662.html][https_www.21ic.com_embed_hardware_can_201810_81662.html]

关于兼容各厂家FPGA的jtag下载器：

[https://www.cnblogs.com/ifpga/p/8542246.html][https_www.cnblogs.com_ifpga_p_8542246.html]

ETM接口：[http://myir-tech.com/resource/510.asp][http_myir-tech.com_resource_510.asp]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 8][]

ARM ETM Debugger:***https://www2.lauterbach.com/pdf/trace\_arm\_etm.pdf***

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 9][]

\#关于SSI器件的irinstruct:

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 10][]

[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70]: /images/20221005/cc73428b8bff49858cf4eb4c96a74aa5.png
[https_www.xilinx.com_support_documentation_sw_manuals_xilinx2017_4_ug1208-xsct-reference-guide.pdf]: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1208-xsct-reference-guide.pdf
[https_forums.xilinx.com_t5_FPGA-Configuration_How-to-use-BSCANE2-and-BSCAN2JTAG-IP-to-access-own-TAP-through_td-p_1115013]: https://forums.xilinx.com/t5/FPGA-Configuration/How-to-use-BSCANE2-and-BSCAN2JTAG-IP-to-access-own-TAP-through/td-p/1115013
[https_github.com_eugene-tarassov_vivado-risc-v_blob_master_vhdl-wrapper_src_net_largest_riscv_vhdl_bscan2jtag.vhdl]: https://github.com/eugene-tarassov/vivado-risc-v/blob/master/vhdl-wrapper/src/net/largest/riscv/vhdl/bscan2jtag.vhdl
[https_github.com_watz0n_arty_xjtag]: https://github.com/watz0n/arty_xjtag
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 1]: /images/20221005/af2f4d0c8aab48988d78ff6781cde91f.png
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 2]: /images/20221005/d9a890e38739438db796b0648f97447e.png
[http_xilinx.eetrend.com_d6-xilinx_blog_2015-08_8908.html]: http://xilinx.eetrend.com/d6-xilinx/blog/2015-08/8908.html
[https_www.cnblogs.com_e-shannon_p_5919933.html]: https://www.cnblogs.com/e-shannon/p/5919933.html
[https_www.maximintegrated.com_cn_design_technical-documents_app-notes_3_3339.html]: https://www.maximintegrated.com/cn/design/technical-documents/app-notes/3/3339.html
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 3]: /images/20221005/b8c419aed25145298c545f0a28b6d138.png
[https_www.xilinx.com_html_docs_xilinx2018_1_SDK_Doc_xsct_jtag_reference_xsct_jtag.html]: https://www.xilinx.com/html_docs/xilinx2018_1/SDK_Doc/xsct/jtag/reference_xsct_jtag.html
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 4]: /images/20221005/1fe3260439534a9088f1de8b2375d6cf.png
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 5]: /images/20221005/75b99391e9504fd1ab46dcce217d8bf9.png
[https_developer.arm.com_architectures_system-architectures_system-components_coresight_serial-wire-debug]: https://developer.arm.com/architectures/system-architectures/system-components/coresight/serial-wire-debug
[https_www.xilinx.com_products_intellectual-property_picoblaze.html_design]: https://www.xilinx.com/products/intellectual-property/picoblaze.html#design
[https_www.xilinx.com_support_documentation_application_notes_xapp188.pdf]: https://www.xilinx.com/support/documentation/application_notes/xapp188.pdf
[https_jsteward.moe_risc-v-hardware-design-part-b-edgeboard-series.html]: https://jsteward.moe/risc-v-hardware-design-part-b-edgeboard-series.html
[https_jia.je_hardware_2020_02_09_rocket-chip-bscan-analysis]: https://jia.je/hardware/2020/02/09/rocket-chip-bscan-analysis/
[https_jia.je_hardware_2020_02_09_program-artix7-on-macos]: https://jia.je/hardware/2020/02/09/program-artix7-on-macos/
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 6]: /images/20221005/a6df09c1f0a1483ca5a43da87154ee0f.png
[https_github.com_jordens_bscan_spi]: https://github.com/jordens/bscan_spi
[https_github.com_cambridgehackers_fpgajtag]: https://github.com/cambridgehackers/fpgajtag
[https_stackoverflow.com_questions_30606531_any-example-useage-of-a-bscane2-primitive-in-xilinx-7-series-using-the-jtag-po]: https://stackoverflow.com/questions/30606531/any-example-useage-of-a-bscane2-primitive-in-xilinx-7-series-using-the-jtag-po
[http_xilinx.eetrend.com_content_2020_100059704.html]: http://xilinx.eetrend.com/content/2020/100059704.html
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 7]: /images/20221005/5a323e0696b54806b32b2df963dc550d.png
[https_github.com_riscv_riscv-openocd_tree_7cb8843794a258380b7c37509e5c693977675b2a]: https://github.com/riscv/riscv-openocd/tree/7cb8843794a258380b7c37509e5c693977675b2a
[http_openocd.org]: http://openocd.org/
[http_xc3sprog.sourceforge.net_manpage.php]: http://xc3sprog.sourceforge.net/manpage.php
[https_www.21ic.com_embed_hardware_can_201810_81662.html]: https://www.21ic.com/embed/hardware/can/201810/81662.html
[https_www.cnblogs.com_ifpga_p_8542246.html]: https://www.cnblogs.com/ifpga/p/8542246.html
[http_myir-tech.com_resource_510.asp]: http://myir-tech.com/resource/510.asp
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 8]: /images/20221005/2824fd6f96a941d790709c206c505ca8.png
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 9]: /images/20221005/7a6e1166cbeb49129e2de1fd2b87b45a.png
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 10]: /images/20221005/e2020f738ab644fbaf1e408ecea018e7.png